Every stream arrives at once. The CPU takes them one at a time.
- Longer reaction time — every result waits on four memory trips
- Delay that varies frame to frame — each stream waits its turn on the CPU
- Adding a sensor degrades latency for all of them
01 / WHY IT MATTERS
Moving raw data is expensive. There is more of it every year.
Every sensor produces a raw stream, and every stream is hauled to a processor before anything useful happens to it. In sensor-dense systems that movement, not the computation, is becoming the bottleneck — and sensor counts are still climbing.
10–15sensors in a phone
60–100in a car
2,000–25,000in an aircraft
Every one of those numbers is still rising, and each sensor adds a stream.
02 / WHY NEAR-SENSOR
Move less data. React sooner.
In sensing-intensive systems every raw stream is written to shared memory, pre-processed by the CPU, written back, and only then read by the accelerator. RiDM does that work where the data is produced.
Every stream arrives at once. They get processed that way too.
- Shorter path to a result — data is reduced before it reaches memory
- Steadier delay — no stream waits its turn behind another
- Host latency is designed to hold as sensors are added
Illustrative data path
03 / DODA ARCHITECTURE
A dataflow machine, orchestrated at runtime.
DODA runs an operation when its data is ready, rather than following a schedule fixed when the program was compiled. The pipeline can be rebuilt for a new workload without new silicon.
DODA STANDS FOR
Dynamically Orchestrated Dataflow Architecture
Orchestration happens as data arrives, not ahead of time. That is the difference between a dataflow machine and a fixed pipeline.
LINEAGE
From a PhD thesis to filed IP.
Toward General-Purpose Dynamic Dataflow Processing
Jinho Lee’s PhD research at NUS, pursuing a general-purpose dataflow architecture that is both fast and efficient.
NUS ScholarBank ↗Three PCT patent families
Covering the core architecture, its interconnect, and runtime reconfiguration.
- WO2023/234867Reconfigurable Computing Architecture
- WO2024/242626 A1Hierarchical Network Design for Dynamic Dataflow Style Architectures
- WO2026/015086 A1Adaptive and Reconfigurable Dataflow Computing System and Method